Course Integrated Circuit Design - Transistor Level
The enrollment will be effected on the OPAL platform, where you'll find further informations about the course.
Course Content
Lecture Complexes- Specifics of Integrated Circuits
- Digital elementary Circuits in MOS- and CMOS-Technology
- Inverter in MOS-Technology (Analysis, Design)
- Inverter in CMOS-Technology (Analysis, Design)
- Logic Design with Transmission Gates (Transfer characteristic, resistive characteristic, dynamic behavior)
- Circuit Interconnections (Input Stages, Output Stages)
- Array and Split Structures
- C²MOS Technique
- Differential CMOS Logic
- Schmitt Trigger as special Comparator Circuit
- Digital Bipolar Circuits
- Emitter Coupled Logic
- Current Mode Logic (CML)
- Digital BiCMOS Circuits
- Elementary Circuitry
- Rail to Rail BiCMOS Circuits
- BiCMOS Logic
- Dynamic MOS Circuits
- Pseudo NMOS-Technique
- DOMINO CMOS Logic
- No-Race-Logic (NORA-Logic)
- Dynamic Current Mode Logic (DyCML)
- Analog Elementary Circuits
- Current Sources - Current Mirror
- Voltage Sources
- Amplifier
- Special Circuits
- DRAM Read-out Amplifier
- Oscillators
- Analysis of inverters
- Dimensioning of MOS inverters and gates, transfer characteristic of different logic families
- Analysis and dimensioning of CMOS circuits
- Analysis and dimensioning of ECL circuits
- Analysis and dimensioning of voltage sources
- Design of combinational and sequential circuits
- Function analysis of CMOS and BiCMOS gates
- Output stages, ring oscillators and DRAM readout amplifiers
- Complex Lab
- Dimensioning and electric simulation of a simple circuitry
- Transformation into layout respecting given design rules
- Network extraction and comparison (LVS)
- Optional extraction of parasitic capacitances (PEX)
Degree Programs
- Compulsory Elective Subject in the 2nd Semester of the Master Course Micro and Nano Systems (M_MN__2)
- Compulsory Elective Subject in the 2nd Semester of the Master Course Computational Science (M_CS__2)
Timetable for the current Semester
Type | Weekday | Groups | Time | Room | Start |
---|---|---|---|---|---|
L | on Thursdays | M_MN1_2, M_MN2_2, M_CS__2 | 13.45-15.15 | 2/NK003 | 2024-04-04 |
E | on Tuesdays, 1st week | M_MN1_2, M_MN2_2, M_CS__2 | 09.15-10.45 | 2/D221 | 2024-04-09 |
P | on Wednesdays | M_MN1_2, M_MN2_2, M_CS__2 | 07.30-10.45 | 2/W368 | 2024-04-24 |
Teaching Materials
- Lecture slides
- 1 - Introduction
- 2 - (Bipolar) Transistor Logic
- 3 - (MOS) Single Channel Logic
- 4 - CMOS
- 4b - CMOS Transmission gates
- 5 - Current Mode Logic
- 6 - Digital Design
- Exercises
- 1 - Buffer Design (SS 2019)
- 2 - Integrated Resistors (SS 2019)
- 3 - Design Rules (SS 2019)
- Lab Documents
Examination current Semester (catch up and repeat)
Date / Time: | individually |
---|---|
Room: | C25.319 (old: 2/W319) |
Type: | Oral examination, every 30 min |
Examiner: | Prof. Horstmann |
Observer: | M.Eng. Hafez |