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InProceedings
2000
Wolfram Hardt and Bernd Kleinjohann and Achim Rettberg
The Flysig Prototyping Approach
IN Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping, IEEE Computer Society, 2000.
The Flysig Prototyping Approach
IN Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping, IEEE Computer Society, 2000.
1999
Wolfram Hardt and Bernd Kleinjohann and Achim Rettberg and Lisa Kleinjohann
A new Configurable and Scalable Architecture for Rapid Prototyping Asynchronous Designs for Signal Processing
IN Proceedings of the 12th Annual IEEE International ASIC/SOC Conference, September 1999.
A new Configurable and Scalable Architecture for Rapid Prototyping Asynchronous Designs for Signal Processing
IN Proceedings of the 12th Annual IEEE International ASIC/SOC Conference, September 1999.
Wolfram Hardt and Achim Rettberg and Bernd Kleinjohann
The PARADISE design environment
IN 1st New Zealand Embedded System Conference, July 1999.
The PARADISE design environment
IN 1st New Zealand Embedded System Conference, July 1999.
1998
Del Castillo and Wolfram Hardt
Fast Dynamic Analysis of Complex HW/SW-Systems
IN Proc of the 6th IFIP International Workshop on Hardware / Software Codesign - CODES / CACHE'98, IEEE Computer Society, October 1998.
Fast Dynamic Analysis of Complex HW/SW-Systems
IN Proc of the 6th IFIP International Workshop on Hardware / Software Codesign - CODES / CACHE'98, IEEE Computer Society, October 1998.
Wolfram Hardt and Peter Altenbernd and Carsten Böke and Del Castillo and Carsten Ditze and Erpenbach and Glässer and Bernd Kleinjohann and Lehrenfeld and Franz Rammig and Carsten Rust and Friedhelm Stappert and Joachim Stroop and Tacken
Paradise: Design Environment for Parallel & Distributed, Embedded Real-Time Systems
IN Int. IFIP WG 10.3 / WG 10.5 Workshop on Distributed and Parallel Embedded Systems (DIPES'98), Kluwer Academic Publishers, October 1998.
Paradise: Design Environment for Parallel & Distributed, Embedded Real-Time Systems
IN Int. IFIP WG 10.3 / WG 10.5 Workshop on Distributed and Parallel Embedded Systems (DIPES'98), Kluwer Academic Publishers, October 1998.
Wolfram Hardt and Achim Rettberg
Towards an Automated Approach for Design of Testable Dataflow-Oriented Delay-Insensitive Processors
IN 1st International Workshop on Design, Test and Applications, IEEE Computer Society, June 1998.
Towards an Automated Approach for Design of Testable Dataflow-Oriented Delay-Insensitive Processors
IN 1st International Workshop on Design, Test and Applications, IEEE Computer Society, June 1998.
Wolfram Hardt and Bernd Kleinjohann
Flysig: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Sinal Processing
IN 9th IEEE International Workshop on Rapid System Prototyping (RSP'98), IEEE Computer Society, June 1998.
Flysig: Dataflow Oriented Delay-Insensitive Processor for Rapid Prototyping of Sinal Processing
IN 9th IEEE International Workshop on Rapid System Prototyping (RSP'98), IEEE Computer Society, June 1998.
Del Castillo and Wolfram Hardt
Towards a Unified Analysis Methodology of HW/SW Systems based on Abstract State Machines: Modelling of Instruction Sets
IN GI/ITG/GMM Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, March 1998.
Towards a Unified Analysis Methodology of HW/SW Systems based on Abstract State Machines: Modelling of Instruction Sets
IN GI/ITG/GMM Workshop: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, March 1998.
Wolfram Hardt and Bernd Kleinjohann
Flysig: Towards High Performance Special Purpose Architectures by Joining Paradigms
IN 7th Nasa Symposium on VLSI Design, January 1998.
Flysig: Towards High Performance Special Purpose Architectures by Joining Paradigms
IN 7th Nasa Symposium on VLSI Design, January 1998.
1997
Wolfram Hardt and Bernd Kleinjohann
Eine Asynchrone Datenflußarchitektur für Eingebettete Systeme
IN 4. ITG/GI-Fachtagung Architektur von Rechensystemen, WS Zielarchitekturen Eingebetteter Systeme, September 1997.
Eine Asynchrone Datenflußarchitektur für Eingebettete Systeme
IN 4. ITG/GI-Fachtagung Architektur von Rechensystemen, WS Zielarchitekturen Eingebetteter Systeme, September 1997.
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